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Requirement for Senior Lead Engineer Virtual Platforms

Job Role: Senior Lead Engineer – Virtual Platforms

Location: Noida / Bangalore

Experience: 7-10 years

Job Description:

You will work on the development of Virtual models in C++. You will be responsible for design, implementation and testing these models. You will also be responsible for leading/mentoring/managing a team.

Key Technical Skills:

  1. Hands-on working experience with design, implementation, and testing of SystemC peripheral models
  2. Proficient in TLM2.0 modeling, including loosely timed and approximately times models and use of generic payload
  3. Prior experience in modeling peripherals with different on-chip and off-chip interfaces like USARTs, Timers, SPI controllers, DMA controllers, I2C controllers, Interrupt controllers, Ethernet, PCIe, controllers etc.
  4. Solid fundamentals in SoC architecture, well versed with concepts like DMA, interrupt architecture, queuing and arbitration in hardware
  5. Exposure to Python or Tcl (Good to have)
  6. Exposure to Virtual Platforms (VP) integration, software bring-up and debugging on Virtual Platforms (Good to have)
Please share CV at  PH: 08041506674

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